Semiconductor ICs are typically mass-produced in wafer form, wherein each wafer comprises a large number of manufactured ICs. When wafers with confirmed working ICs are received for assembly and packaging, the wafers are first cut (or “diced”) into individual dice or chips by a dicing saw or laser. Each die is then picked up and individually attached to a leadframe or other carrier by a die bonding process. The leadframe provides the interface between the electrical circuit on the IC and external systems with which a packaged semiconductor device is to communicate.
Leadframes are commonly produced by stamping or etching a pattern through a strip of copper or iron-nickel alloy. The electrical connection of the die to the leadframe is made by wire bonding with metal wires or direct flip-chip connection on conductive pads, through which the device is able to communicate with the leadframe and also an external host system.
Leadframes for chip scale packages (CSP) can be formed in several configurations, including quad flat pack no-lead (QFN) packages that are currently a popular form of leadframe-based semiconductor package. These are leadless packages with small form factors that are not much larger than the size of the die, wherein molding with encapsulant material is conducted only on one side of the leadframe. The other unmolded surface is used for locating exposed conductive fingers to communicate with external systems. For example, such QFN packages are disclosed in U.S. Pat. No. 6,143,981 entitled “Plastic Integrated Circuit Package and Method and Leadframe for Making the Package”.
Since the leadframe is only molded on one side, there is a greater risk of dislodgement of the encapsulant material since more of the lead is exposed on the surface of the package than in conventional semiconductor packages. This would lead to failure of the package. Accordingly, there is a need to form an interlocking mechanism in the leadframe to enhance the connection between the encapsulant material on the one hand, and the leadframe material on the other hand, as described in the above patent for QFN packages. In order to create a mechanical interlock, reentrant portions and/or asperities are formed in the die pad for attaching the die, and on the inner leads. Such mechanical interlocks also act as moisture barriers to impede moisture from entering the package to come into contact with the internal components of the package which may cause package failure.
Primarily, the aforesaid patent teaches a wet chemical etching approach to form the reentrant portions and asperities. Chemical etching involves using photolithography and chemicals to mill patterns onto leadframes. Portions of the leadframe are etched away to reveal the desired etching pattern. Leadframes are produced by the said etching process for high precision and fast turnaround purposes, and to achieve a shorter time to market. Other advantages of using chemical etching are that there is good lead contour control and the method is applicable to both matrix-type and array-type leadframe layouts. The disadvantage of etching is that it is an expensive process that means higher leadframe costs are incurred.
For certain applications that are less demanding, it is not desirable to employ etching as it is more costly. Thus, an alternative is to employ stamping using punching dies to form the interlocking mechanism. Stamped leadframes are typically used for very high volume production on mature designs to form high density matrix stamped frames.
Although the aforesaid patent also suggests mechanical stamping using progressive dies, the method suggested uses sets of progressive dies to mechanically remove a distinct small area of metal from the strip as the strip moves through the stations to remove metal from the leadframe strip. Such a process is time consuming since it involves punching out material from the leadframe multiple times to cumulatively remove small areas of metal.
A more conventional method for creating stamped frames with the interlocking feature is disclosed in U.S. Pat. No. 5,172,214 entitled “Leadless Semiconductor Device and Method for Making the Same”. The leads of the leadframe are stamped and mechanically deformed into a trapezoidal shape to secure or lock the leads into place in a package body. As a result, each lead has a raised first portion, a second portion that is exposed on the bottom surface of the package body and an intermediate portion between the first and second portions. The exposed surfaces of the second portions of the leads allow the packages to be leadless. These packages with stamped leadframes can be made at lower cost.
However, there are also many disadvantages with this approach, such as the difficulty to maintain co-planarity of the raised leads, and to prevent lead tilt and lead twist. Also, the intermediate portion which bends the lead upwards is not usable for making wire connections between the lead and the die, so that the effective usable lead length is further reduced. Since the transitions between the first, intermediate and second portions of the leads are relatively gradual, roll-over of the leads further reduces the flat tip area of the lead that is available for wire bonding, and affects the sharpness of the exposed lead edge.